The Booth algorithm is a method for performing binary division of two fixed-point numbers in signed-magnitude representation¹. The algorithm uses a cycle of successive compare, shift, and subtract operations to divide the dividend by the divisor and obtain the quotient and the remainder².

The hardware implementation of the division operation is similar to that required for multiplication and consists of the following components²:

• A register B to store the divisor

• A double-length register AQ to store the dividend and the quotient

• A register E to store the sign and magnitude information

• A sequence counter register SC to store the number of bits in the dividend

The flowchart of the division algorithm is shown below²:

The steps of the algorithm are as follows²:

• Initialize the registers B, AQ, E, and SC with the divisor, dividend, sign, and bit count respectively.

• Check for divide overflow by comparing A and B. If A >= B, set DVF (divide overflow flag) and terminate. If A < B, restore A by adding B to it.

• Shift AQ left by one bit and transfer the high-order bit to E.

• If E = 1, subtract B from EA and insert 1 into Q as the quotient bit. If E = 0, add B to EA and insert 0 into Q as the quotient bit.

• Decrement SC by one. If SC > 0, go to step 3. Otherwise, terminate.

• The final value of Q is the quotient and the final value of A is the remainder.

Here is an example of applying the Booth algorithm to divide -13 by 3¹:

The quotient is -4 and the remainder is -1.